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author | Mike Frysinger <vapier@gentoo.org> | 2005-08-17 01:09:36 +0000 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2005-08-17 01:09:36 +0000 |
commit | 934463e098d76c591f8f9c0a3de90aad32c15283 (patch) | |
tree | f87067e27ea352296350b7e6e1209ab71b4481aa /3.3.6 | |
parent | add backport from gcc-4 branches to address pr18300 for #102244 by Zak Kipling (diff) | |
download | gcc-patches-934463e098d76c591f8f9c0a3de90aad32c15283.tar.gz gcc-patches-934463e098d76c591f8f9c0a3de90aad32c15283.tar.bz2 gcc-patches-934463e098d76c591f8f9c0a3de90aad32c15283.zip |
backport of pr22528 for gcc-3.3
Diffstat (limited to '3.3.6')
-rw-r--r-- | 3.3.6/gentoo/12_all_gcc-3.3-arm-pr22528.patch | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/3.3.6/gentoo/12_all_gcc-3.3-arm-pr22528.patch b/3.3.6/gentoo/12_all_gcc-3.3-arm-pr22528.patch new file mode 100644 index 0000000..996e763 --- /dev/null +++ b/3.3.6/gentoo/12_all_gcc-3.3-arm-pr22528.patch @@ -0,0 +1,76 @@ +http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22528 +http://gcc.gnu.org/ml/gcc-patches/2003-11/msg00832.html + +2003-11-12 Richard Earnshaw <rearnsha@arm.com> + + * arm.md (storehi): Avoid use of explicit subreg. + (storehi_bigend, storeinthi, movhi_bigend): Likewise. + +--- gcc/config/arm/arm.md ++++ gcc/config/arm/arm.md +@@ -4275,7 +4275,7 @@ + (set (match_dup 2) + (ashiftrt:SI (match_operand 0 "" "") (const_int 8))) + ;; store the high byte +- (set (match_dup 4) (subreg:QI (match_dup 2) 0))] ;explicit subreg safe ++ (set (match_dup 4) (match_dup 5))] + "TARGET_ARM" + " + { +@@ -4291,7 +4291,8 @@ + operands[1] = adjust_address (operands[1], QImode, 0); + operands[3] = gen_lowpart (QImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); +- operands[2] = gen_reg_rtx (SImode); ++ operands[2] = gen_reg_rtx (SImode); ++ operands[5] = gen_lowpart (QImode, operands[2]); + }" + ) + +@@ -4299,7 +4300,7 @@ + [(set (match_dup 4) (match_dup 3)) + (set (match_dup 2) + (ashiftrt:SI (match_operand 0 "" "") (const_int 8))) +- (set (match_operand 1 "" "") (subreg:QI (match_dup 2) 3))] ++ (set (match_operand 1 "" "") (match_dup 5))] + "TARGET_ARM" + " + { +@@ -4316,13 +4317,14 @@ + operands[3] = gen_lowpart (QImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); + operands[2] = gen_reg_rtx (SImode); ++ operands[5] = gen_lowpart (QImode, operands[2]); + }" + ) + + ;; Subroutine to store a half word integer constant into memory. + (define_expand "storeinthi" + [(set (match_operand 0 "" "") +- (subreg:QI (match_operand 1 "" "") 0)) ++ (match_operand 1 "" "")) + (set (match_dup 3) (match_dup 2))] + "TARGET_ARM" + " +@@ -4363,6 +4365,7 @@ + operands[3] = adjust_address (op0, QImode, 1); + operands[0] = adjust_address (operands[0], QImode, 0); + operands[2] = gen_lowpart (QImode, operands[2]); ++ operands[1] = gen_lowpart (QImode, operands[1]); + }" + ) + +@@ -4682,11 +4685,12 @@ + (set (match_dup 3) + (ashiftrt:SI (match_dup 2) (const_int 16))) + (set (match_operand:HI 0 "s_register_operand" "") +- (subreg:HI (match_dup 3) 0))] ++ (match_dup 4))] + "TARGET_ARM" + " + operands[2] = gen_reg_rtx (SImode); + operands[3] = gen_reg_rtx (SImode); ++ operands[4] = gen_lowpart (HImode, operands[3]); + " + ) + |