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* Update x86 CPU_XXX_FLAGS handlingH.J. Lu2016-05-275-5452/+5631
* Replace CpuAMD64/CpuIntel64 with AMD64/Intel64H.J. Lu2016-05-276-10532/+10554
* Correct CpuMax in i386-opc.hH.J. Lu2016-05-274-4/+20
* Improve the MSP430 disassembler's handling of memory read errors.Nick Clifton2016-05-272-272/+408
* Add support for new POWER ISA 3.0 instructions.Peter Bergner2016-05-262-0/+13
* Enable VREX for all AVX512 directivesH.J. Lu2016-05-253-49/+58
* Enable VREX for AVX512 directivesH.J. Lu2016-05-253-8/+15
* Reimplement .no87/.nommx/.nosse/.noavx directivesH.J. Lu2016-05-253-2/+17
* [ARC] Update instruction type and delay slot info.Claudiu Zissulescu2016-05-234-113/+144
* [ARC] Add XY registers, update neg instruction.Claudiu Zissulescu2016-05-232-0/+7
* [ARC] Rename "class" named attributes.Claudiu Zissulescu2016-05-233-5/+11
* tic54x: rename typedef of struct symbol_Trevor Saunders2016-05-233-7/+12
* Correct "Fix powerpc subis range"Alan Modra2016-05-192-1/+5
* Fix powerpc subis rangeAlan Modra2016-05-192-12/+26
* MIPS/opcodes: Correct mixed MIPS16 and microMIPS disassemblyMaciej W. Rozycki2016-05-182-17/+28
* Accept valid one byte signed and unsigned values for the IMM8 operand.Peter Bergner2016-05-132-1/+5
* Add MIPS32 DSPr3 support.Matthew Fortune2016-05-113-2/+11
* Enable Intel RDPID instruction.Alexander Fomin2016-05-107-5308/+5365
* Use getters/setters to access ARM branch typeThomas Preud'homme2016-05-102-4/+11
* Add support for ARMv8-M security extensions instructionsThomas Preud'homme2016-05-102-1/+29
* opcodes,gas: sparc: fix mnemonic of faligndataiJose E. Marchesi2016-05-092-4/+7
* Regenerate configureAlan Modra2016-05-091-7/+10
* [ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructionsClaudiu Zissulescu2016-05-043-7/+66
* Fix generation of AArhc64 instruction table.Szabolcs Nagy2016-05-035-6/+17
* Add support to AArch64 disassembler for verifying instructions. Add verifier...Nick Clifton2016-04-285-1332/+1239
* Skip if size of bfd_vma is smaller than address sizeH.J. Lu2016-04-232-0/+14
* update many old style function definitionsTrevor Saunders2016-04-2021-141/+98
* opcodes/arc: Add yet more nps instructionsAndrew Burgess2016-04-193-23/+246
* opcodes/arc: Add more nps instructionsAndrew Burgess2016-04-192-0/+23
* Regenerate Makefile.in/aclocal.m4 automake 1.11.6H.J. Lu2016-04-153-45/+104
* arc/nps400 : New cmem instructions and associated relocationAndrew Burgess2016-04-143-0/+42
* opcodes/arc: Move instruction length logic to new functionAndrew Burgess2016-04-142-13/+50
* Fix disassembly of the V850's LD.BU instruction.Nick Clifton2016-04-132-2/+8
* Add support for .extCondCode, .extCoreRegister and .extAuxRegister.Claudiu Zissulescu2016-04-125-437/+543
* Update ARC instruction data-base.Claudiu Zissulescu2016-04-122-0/+10
* Add support for .extInstruction pseudo-op.Claudiu Zissulescu2016-04-125-142/+554
* MIPS/opcodes: Fix undecoded MIPS16 extended instruction bit disassemblyMaciej W. Rozycki2016-04-112-2/+9
* arc/nps400: Add new instructionsAndrew Burgess2016-04-073-0/+73
* gas/arc: Handle multiple arc_opcode chains for same mnemonicAndrew Burgess2016-04-072-1/+35
* arc/nps400: Add additional instructionsAndrew Burgess2016-04-053-2/+241
* [ARC] Fix support for double assist instructions.Claudiu Zissulescu2016-04-054-1064/+1077
* [ARM] Add ARMv8.2 FP16 vmul/vmla/vmls (by scalar)Jiong Wang2016-04-052-6/+22
* opcodes: Fix date in ChangeLog entryAndrew Burgess2016-03-311-1/+1
* opcodes/arc/nps: Fix some operand flagsAndrew Burgess2016-03-312-2/+7
* enable -Wwrite-strings for gasTrevor Saunders2016-03-311-2/+18
* opcodes/arc: Comment and whitespace fixes in opcode tableAndrew Burgess2016-03-302-6/+13
* [ARC] Cleanup AUX register names.Claudiu Zissulescu2016-03-302-27/+13
* [ARC] Fix typo in extension instruction name.Claudiu Zissulescu2016-03-292-1/+5
* [ARC] Add support for Quarkse opcodes.Claudiu Zissulescu2016-03-295-6/+130
* More -Wstack-usage warnings: opcodes/aarch64-*Jan Kratochvil2016-03-243-7/+11