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fork/binutils-gdb.git
gentoo/binutils-2.29.1
gentoo/binutils-2.30
gentoo/binutils-2.31
gentoo/binutils-2.31.1
gentoo/binutils-2.32
gentoo/binutils-2.33.1
gentoo/binutils-2.34
gentoo/binutils-2.35
gentoo/binutils-2.35.1
gentoo/binutils-2.35.2
gentoo/binutils-2.36
gentoo/binutils-2.36.1
gentoo/binutils-2.37
gentoo/binutils-2.38
gentoo/binutils-2.39
gentoo/binutils-2.40
gentoo/binutils-2.41
gentoo/binutils-2.42
gentoo/binutils-2.43
gentoo/binutils-2.44
gentoo/dilfridge/test-libctf
master
Gentoo vendor branches of the binutils / gdb code
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include
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Author
Age
Files
Lines
*
Clarify that include/opcode/ files are part of GNU opcodes
Dimitar Dimitrov
2017-01-25
7
-6
/
+15
*
Fix include/ChangeLog entry format
Pedro Alves
2017-01-25
1
-1
/
+1
*
[PATCH] Add NT_ARM_SVE
Alan Hayward
2017-01-24
2
-0
/
+6
*
[DWARF] Sync GCC dwarf.def change on AArch64
Jiong Wang
2017-01-04
2
-1
/
+18
*
[AArch64] Add separate feature flag for weaker release consistent load insns
Szabolcs Nagy
2017-01-04
2
-1
/
+8
*
Add support for the Q extension to the RISCV ISA.
Kito Cheng
2017-01-03
3
-0
/
+108
*
Sync dwarf headers with master versions in gcc repository.
Nick Clifton
2017-01-03
3
-18
/
+213
*
Update year range in copyright notice of all files.
Alan Modra
2017-01-02
300
-299
/
+303
*
ChangeLog rotation
Alan Modra
2017-01-02
2
-829
/
+843
*
update copyright year range in GDB files
Joel Brobecker
2017-01-01
22
-22
/
+22
*
PRU BFD support
Dimitar Dimitrov
2016-12-31
5
-1
/
+475
*
MIPS16: Add ASMACRO instruction support
Maciej W. Rozycki
2016-12-23
2
-2
/
+13
*
MIPS16: Reassign `0' and `4' operand codes
Maciej W. Rozycki
2016-12-23
2
-5
/
+10
*
MIPS16: Handle non-extensible instructions correctly
Maciej W. Rozycki
2016-12-23
2
-0
/
+8
*
Remove high bit set characters
Alan Modra
2016-12-21
3
-9
/
+14
*
MIPS16: Switch to 32-bit opcode table interpretation
Maciej W. Rozycki
2016-12-20
2
-0
/
+12
*
Re-work RISC-V gas flags: now we just support -mabi and -march
Andrew Waterman
2016-12-20
2
-2
/
+21
*
Rework RISC-V relocations
Andrew Waterman
2016-12-20
2
-0
/
+13
*
Implement and document --gc-keep-exported
fincs
2016-12-16
2
-0
/
+7
*
MIPS/opcodes: Also set disassembler's ASE flags from ELF structures
Maciej W. Rozycki
2016-12-14
2
-1
/
+6
*
[Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm field
Renlin Li
2016-12-13
2
-3
/
+11
*
MIPS16: Remove unused `>' operand code
Maciej W. Rozycki
2016-12-09
2
-2
/
+5
*
MIPS/include: opcode/mips.h: Correct INSN_CHIP_MASK
Maciej W. Rozycki
2016-12-07
2
-1
/
+5
*
MIPS/include: opcode/mips.h: Add a comment for ASE_DSPR3
Maciej W. Rozycki
2016-12-07
2
-0
/
+5
*
[ARM] Add ARMv8.3 command line option and feature flag
Szabolcs Nagy
2016-12-05
2
-0
/
+9
*
[ARC] Add checking for LP_COUNT reg usage, improve error reporting.
Claudiu Zissulescu
2016-11-29
2
-0
/
+10
*
gas,opcodes: fix hardware capabilities bumping in the sparc assembler.
Jose E. Marchesi
2016-11-22
2
-0
/
+9
*
PR20744, Incorrect PowerPC VLE relocs
Alan Modra
2016-11-22
2
-0
/
+22
*
libiberty: Add Rust symbol demangling.
David Tolnay
2016-11-18
2
-2
/
+39
*
Implement P0012R1, Make exception specifications part of the type system.
Jason Merrill
2016-11-18
2
-1
/
+8
*
[AArch64] Add ARMv8.3 FCMLA and FCADD instructions
Szabolcs Nagy
2016-11-18
2
-0
/
+11
*
[AArch64] Add ARMv8.3 combined pointer authentication load instructions
Szabolcs Nagy
2016-11-18
2
-0
/
+7
*
[AArch64] Add ARMv8.3 PACGA instruction
Szabolcs Nagy
2016-11-11
2
-0
/
+5
*
[AArch64] Add ARMv8.3 command line option and feature flag
Szabolcs Nagy
2016-11-11
2
-14
/
+13
*
Commit missing ChangeLog entry for Cortex-M33 support
Thomas Preud'homme
2016-11-04
1
-0
/
+6
*
Add support for ARM Cortex-M33 processor
Thomas Preud'homme
2016-11-04
1
-0
/
+4
*
arc: Implement NPS-400 dcmac instruction
Graham Markall
2016-11-03
2
-0
/
+5
*
arc: Change max instruction length to 64-bits
Andrew Burgess
2016-11-03
2
-28
/
+15
*
opcodes/arc: Make some macros 64-bit safe
Graham Markall
2016-11-03
2
-26
/
+32
*
arc: Replace ARC_SHORT macro with arc_opcode_len function
Graham Markall
2016-11-03
2
-4
/
+8
*
Add support for RISC-V architecture.
Nick Clifton
2016-11-01
5
-0
/
+1606
*
Update list of ELF machine numbers.
Nick Clifton
2016-10-17
2
-2
/
+41
*
FINAL/OVERRIDE: Define to empty on g++ < 4.7
Pedro Alves
2016-10-14
2
-5
/
+24
*
Move OVERRIDE/FINAL from gcc/coretypes.h to include/ansidecl.h
Pedro Alves
2016-10-14
2
-6
/
+27
*
[ARC] Disassembler: fix LIMM detection for short instructions.
Claudiu Zissulescu
2016-10-14
2
-0
/
+5
*
Disallow 3-operand cmp[l][i] for ppc64
Alan Modra
2016-09-29
2
-0
/
+8
*
[ARC] ISA alignment.
Claudiu Zissulescu
2016-09-26
2
-1
/
+7
*
PowerPC .gnu.attributes
Alan Modra
2016-09-26
2
-5
/
+16
*
[AArch64] Add SVE condition codes
Richard Sandiford
2016-09-21
2
-1
/
+5
*
[AArch64][SVE 31/32] Add SVE instructions
Richard Sandiford
2016-09-21
2
-0
/
+20
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