| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | S/390: Implement instruction set extensions |   Andreas Krebbel | 2019-01-31 | 1 | -0/+1 |
| * | AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte... |   Sudi Das | 2019-01-25 | 1 | -2/+0 |
| * | RX: include - Add RXv3 support. |   Yoshinori Sato | 2019-01-05 | 1 | -0/+32 |
| * | Update year range in copyright notice of binutils files |   Alan Modra | 2019-01-01 | 69 | -69/+69 |
| * | PR24028, PPC_INT_FMT | Alan Modra | 2018-12-28 | 1 | -8/+0 |
| * | PowerPC @l, @h and @ha warnings, plus VLE e_li | Alan Modra | 2018-12-06 | 1 | -0/+5 |
| * | opcodes/riscv: Hide '.L0 ' fake symbols |   Andrew Burgess | 2018-12-06 | 1 | -0/+6 |
| * | RISC-V: Accept version, supervisor ext and more than one NSE for -march. |   Jim Wilson | 2018-12-03 | 1 | -1/+1 |
| * | RISC-V: Add .insn CA support. | Jim Wilson | 2018-11-27 | 1 | -0/+4 |
| * | [ARM] Improve indentation of ARM architecture declarations |   Thomas Preud'homme | 2018-11-13 | 1 | -254/+281 |
| * | [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension | Sudakshina Das | 2018-11-12 | 1 | -0/+2 |
| * | [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten... | Sudakshina Das | 2018-11-12 | 1 | -0/+8 |
| * | [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex... | Sudakshina Das | 2018-11-12 | 1 | -0/+2 |
| * | [BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-A | Sudakshina Das | 2018-11-12 | 1 | -0/+2 |
| * | [BINUTILS, ARM] Add Armv8.5-A to select_arm_features and update macros. | Sudakshina Das | 2018-11-06 | 1 | -4/+3 |
| * | [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS | Sudakshina Das | 2018-10-09 | 1 | -1/+4 |
| * | [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers | Sudakshina Das | 2018-10-09 | 1 | -1/+8 |
| * | [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction | Sudakshina Das | 2018-10-09 | 1 | -1/+12 |
| * | [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions | Sudakshina Das | 2018-10-09 | 1 | -0/+2 |
| * | [PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction | Sudakshina Das | 2018-10-09 | 1 | -1/+4 |
| * | [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions | Sudakshina Das | 2018-10-09 | 1 | -1/+6 |
| * | [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A | Sudakshina Das | 2018-10-09 | 1 | -1/+4 |
| * | [PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-A | Sudakshina Das | 2018-10-09 | 1 | -1/+8 |
| * | [PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal fea... | Sudakshina Das | 2018-10-09 | 1 | -0/+4 |
| * | [Arm, 3/3] Add Execution and Data Prediction instructions for AArch32 | Sudakshina Das | 2018-10-05 | 1 | -1/+3 |
| * | [Arm, 2/3] Add instruction SB for AArch32 | Sudakshina Das | 2018-10-05 | 1 | -1/+3 |
| * | [Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32 | Sudakshina Das | 2018-10-05 | 1 | -0/+5 |
| * | AArch64: Add SVE constraints verifier. |   Tamar Christina | 2018-10-03 | 1 | -2/+8 |
| * | AArch64: Refactor verifiers to make more general. | Tamar Christina | 2018-10-03 | 1 | -1/+3 |
| * | AArch64: Refactor err_type. | Tamar Christina | 2018-10-03 | 1 | -1/+11 |
| * | AArch64: Wire through instr_sequence | Tamar Christina | 2018-10-03 | 1 | -2/+22 |
| * | AArch64: Mark sve instructions that require MOVPRFX constraints | Tamar Christina | 2018-10-03 | 1 | -2/+16 |
| * | RISC-V: Add fence.tso instruction |   Palmer Dabbelt | 2018-10-02 | 1 | -0/+2 |
| * | Andes Technology has good news for you, we plan to update the nds32 port of b... |   Nick Clifton | 2018-09-20 | 1 | -23/+181 |
| * | RISC-V: Allow instruction require more than one extension | Jim Wilson | 2018-08-30 | 1 | -2/+8 |
| * | [MIPS] Add Loongson 2K1000 proccessor support. |   Chenghua Xu | 2018-08-29 | 1 | -0/+1 |
| * | [MIPS] Add Loongson 3A2000/3A3000 proccessor support. | Chenghua Xu | 2018-08-29 | 1 | -0/+1 |
| * | [MIPS] Add Loongson 3A1000 proccessor support. | Chenghua Xu | 2018-08-29 | 1 | -7/+2 |
| * | [MIPS/GAS] Add Loongson EXT2 Instructions support. | Chenghua Xu | 2018-08-29 | 1 | -0/+2 |
| * | [MIPS/GAS] Split Loongson EXT Instructions from loongson3a. | Chenghua Xu | 2018-08-29 | 1 | -0/+2 |
| * | [MIPS/GAS] Split Loongson CAM Instructions from loongson3a | Chenghua Xu | 2018-08-29 | 1 | -0/+2 |
| * | Use operand->extract to provide defaults for optional PowerPC operands | Alan Modra | 2018-08-21 | 1 | -18/+22 |
| * | S12Z: Move opcode header to public include directory. |   John Darrington | 2018-08-18 | 1 | -0/+71 |
| * | [ARC] Update handling AUX-registers. |   claziss | 2018-08-06 | 1 | -0/+1 |
| * | RISC-V: Set insn info fields correctly when disassembling. | Jim Wilson | 2018-07-30 | 1 | -0/+26 |
| * | Add support for the C_SKY series of processors. |   Andrew Jenner | 2018-07-30 | 1 | -0/+110 |
| * | PowerPC Improve support for Gekko & Broadway |   Alex Chadwick | 2018-07-26 | 1 | -1/+1 |
| * | MIPS/GAS: Split Loongson MMI Instructions from loongson2f/3a | Chenghua Xu | 2018-07-20 | 1 | -0/+2 |
| * | Fix AArch64 encodings for by element instructions. | Tamar Christina | 2018-06-29 | 1 | -0/+2 |
| * | MIPS: Add Global INValidate ASE support |   Faraz Shahbazker | 2018-06-14 | 1 | -1/+6 |
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