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* or1k: add missing l.msync, l.psync and l.psync instructions.Stefan Kristiansson2014-07-201-0/+4
* Whitespace fixes for cpu/or1k.opcAlan Modra2014-06-121-0/+4
* or1k: add support for l.swa/l.lwa atomic instructionsStefan Kristiansson2014-05-081-0/+12
* Remove support for the (deprecated) openrisc and or32 configurations and replaceChristian Svensson2014-04-221-0/+10
* strip off +x bits on non-executable/script filesMike Frysinger2013-12-071-0/+4
* PR binutils/15241Nick Clifton2013-03-081-0/+6
* Add copyright noticesNick Clifton2012-12-101-0/+6
* 2012-11-30 Oleg Raikhman <oleg@adapteva.com>Joern Rennecke2012-11-301-0/+18
* cpu/Alan Modra2012-02-271-0/+4
* * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bitNick Clifton2011-12-151-0/+5
* cpu:Joern Rennecke2011-10-261-0/+6
* bfd:Nick Clifton2011-10-251-0/+5
* Move cpu files from cgen/cpu to top level cpu directory.Nick Clifton2011-08-221-0/+24
* Fix build with -DDEBUG=7Alan Modra2010-10-081-0/+4
* * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.DJ Delorie2010-07-031-0/+4
* * m32r.cpu (HASH-PREFIX): Delete.Doug Evans2010-02-121-0/+19
* * desc-cpu.scm (cgen-desc.h): Don't print virtual enums.Doug Evans2010-01-251-0/+7
* cpu/Doug Evans2010-01-061-0/+5
* * m32c.opc (parse_signed16): Fix typo.Doug Evans2010-01-021-0/+4
* Add -Wshadow to the gcc command line options used when compiling the binutils.Nick Clifton2009-12-111-0/+5
* Must use VOID expression in VOID context.Doug Evans2009-11-141-0/+11
* cpu/Doug Evans2009-10-241-0/+5
* * m32r.cpu (stb-plus): Typo fix.Alan Modra2009-09-251-0/+4
* * m32r.cpu (sth-plus): Fix address mode and calculation.Doug Evans2009-09-231-0/+19
* * cpu/simplify.inc (*): One line doc strings don't need \n.Doug Evans2009-07-161-0/+7
* cpu/Alan Modra2009-06-221-0/+4
* * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.Hans-Peter Nilsson2009-01-071-0/+7
* * cris.cpu (cris-implemented-writable-specregs-v32): Correct sizeHans-Peter Nilsson2009-01-031-0/+5
* Add LM32 port.Nick Clifton2008-12-231-0/+5
* * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c changeAlan Modra2008-01-291-0/+5
* * cris.cpu (movs, movu): Use result of extension operation whenHans-Peter Nilsson2007-10-221-0/+5
* Change source files over to GPLv3.Nick Clifton2007-07-051-0/+9
* Support new FR-V SPRsMark Salter2007-04-301-0/+4
* Changelog entry for previous deltaNick Clifton2007-04-201-0/+5
* * m32c.cpu (Imm-8-s4n): Fix print hook.DJ Delorie2007-03-291-0/+7
* * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,DJ Delorie2007-03-211-0/+12
* * m32r.opc: Formatting.Alan Modra2007-03-081-0/+4
* * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.Nick Clifton2006-05-221-0/+4
* * m32c.opc (parse_unsigned_bitbase): Take a new parameter whichDJ Delorie2006-04-101-0/+14
* * m32c.cpu (Bit3-S): New.DJ Delorie2006-03-141-0/+4
* * m32c.cpu (decimal-subtraction16-insn): Add second operand.DJ Delorie2006-03-141-0/+8
* * m32c.cpu (mul.l): New.DJ Delorie2006-03-111-0/+5
* Fix parseing functions to return an error message if the parse failedNick Clifton2006-03-031-0/+7
* [include/elf]DJ Delorie2006-02-241-0/+13
* Add support for the Infineon XC16X.Nick Clifton2006-02-171-0/+8
* Fix %hi() operator for 64-bit hosts.Nick Clifton2006-02-101-0/+4
* * m32c.cpu (mov.w:q): Fix mode.DJ Delorie2006-01-061-0/+5
* Second part of ms1 to mt renaming.Nathan Sidwell2005-12-161-0/+9
* * m32c.cpu (jsri): Fix order so register names aren't treated asDJ Delorie2005-12-141-0/+7
* Rename ms1 to mt, part 1Nathan Sidwell2005-12-121-0/+5