[1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in GAS.

This patch adds the following relocation support into binutils gas.
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.

Those relocations includes both ip64 and ilp32 variant.

26 files changed, 297 insertions, 6 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 72e305d02f3..5c37b753e7c 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,38 @@
+2018-03-28  Renlin Li  <renlin.li@arm.com>
+
+	PR ld/22970
+	* config/tc-aarch64.c (reloc_table): Update entry for tprel_lo12 and
+	tprel_lo12_nc with pseudo relocations.
+	(ldst_lo12_determine_real_reloc_type): Add new relocations support.
+	(parse_operands): Handle BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12 and
+	BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC pseudo relocations.
+	(md_apply_fix): Add handling for new relocation.
+	(aarch64_force_relocation): Likewise.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d: New.
+
 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 
 	* config/tc-i386.c (check_VecOperands): Replace uses of
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index e857f2929a4..02c92e3901a 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2902,7 +2902,7 @@ static struct reloc_table_entry reloc_table[] = {
    0,
    0,
    BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12,
-   0,
+   BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12,
    0},
 
   /* Get tp offset for a symbol.  */
@@ -2920,7 +2920,7 @@ static struct reloc_table_entry reloc_table[] = {
    0,
    0,
    BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC,
-   0,
+   BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC,
    0},
 
   /* Most significant bits 32-47 of address/value: MOVZ.  */
@@ -5254,7 +5254,7 @@ ldst_lo12_determine_real_reloc_type (void)
   enum aarch64_opnd_qualifier opd0_qlf = inst.base.operands[0].qualifier;
   enum aarch64_opnd_qualifier opd1_qlf = inst.base.operands[1].qualifier;
 
-  const bfd_reloc_code_real_type reloc_ldst_lo12[3][5] = {
+  const bfd_reloc_code_real_type reloc_ldst_lo12[5][5] = {
     {
       BFD_RELOC_AARCH64_LDST8_LO12,
       BFD_RELOC_AARCH64_LDST16_LO12,
@@ -5275,13 +5275,31 @@ ldst_lo12_determine_real_reloc_type (void)
       BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
       BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
       BFD_RELOC_AARCH64_NONE
+    },
+    {
+      BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
+      BFD_RELOC_AARCH64_NONE
+    },
+    {
+      BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
+      BFD_RELOC_AARCH64_NONE
     }
   };
 
   gas_assert (inst.reloc.type == BFD_RELOC_AARCH64_LDST_LO12
 	      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
 	      || (inst.reloc.type
-		  == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC));
+		  == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC)
+	      || (inst.reloc.type
+		  == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12)
+	      || (inst.reloc.type
+		  == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC));
   gas_assert (inst.base.opcode->operands[1] == AARCH64_OPND_ADDR_UIMM12);
 
   if (opd1_qlf == AARCH64_OPND_QLF_NIL)
@@ -5292,7 +5310,9 @@ ldst_lo12_determine_real_reloc_type (void)
 
   logsz = get_logsz (aarch64_get_qualifier_esize (opd1_qlf));
   if (inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
-      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC)
+      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
+      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12
+      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC)
     gas_assert (logsz <= 3);
   else
     gas_assert (logsz <= 4);
@@ -6168,7 +6188,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 		   || (inst.reloc.type
 		       == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12)
 		   || (inst.reloc.type
-		       == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC))
+		       == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC)
+		   || (inst.reloc.type
+		       == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12)
+		   || (inst.reloc.type
+		       == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC))
 	    inst.reloc.type = ldst_lo12_determine_real_reloc_type ();
 	  /* Leave qualifier to be determined by libopcodes.  */
 	  break;
@@ -7861,6 +7885,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
+    case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
@@ -8095,6 +8127,14 @@ aarch64_force_relocation (struct fix *fixp)
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
+    case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d
new file mode 100644
index 00000000000..11ff08f8b17
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d
@@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12-ldst16.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	7980009b 	ldrsh	x27, \[x4\]
+			0: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d
new file mode 100644
index 00000000000..66c17a444d6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d
@@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	7980009b 	ldrsh	x27, \[x4\]
+			0: R_AARCH64_TLSLE_LDST16_TPREL_LO12	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.s b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.s
new file mode 100644
index 00000000000..4496c4862f5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12 for LDST16
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12
+	ldrsh  x27, [x4, #:tprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d
new file mode 100644
index 00000000000..79cffb51bbd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d
@@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12-ldst32.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	b980009b 	ldrsw	x27, \[x4\]
+			0: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d
new file mode 100644
index 00000000000..17b2de3ee48
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d
@@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	b980009b 	ldrsw	x27, \[x4\]
+			0: R_AARCH64_TLSLE_LDST32_TPREL_LO12	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.s b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.s
new file mode 100644
index 00000000000..cd5d6c9be41
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12 for LDST32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12
+	ldrsw  x27, [x4, #:tprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d
new file mode 100644
index 00000000000..25c6f2353e3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d
@@ -0,0 +1,12 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12-ldst64.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d
new file mode 100644
index 00000000000..73277b38c56
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d
@@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_TLSLE_LDST64_TPREL_LO12	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.s b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.s
new file mode 100644
index 00000000000..4358008c323
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12 for LDST64
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12
+	ldr  x27, [x4, #:tprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d
new file mode 100644
index 00000000000..5b6f2330e6a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d
@@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12-ldst8.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	39800115 	ldrsb	x21, \[x8\]
+			0: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d
new file mode 100644
index 00000000000..781997473ce
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d
@@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	39800115 	ldrsb	x21, \[x8\]
+			0: R_AARCH64_TLSLE_LDST8_TPREL_LO12	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.s b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.s
new file mode 100644
index 00000000000..c59eee34649
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12 for LDST8
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12
+	ldrsb  x21, [x8, #:tprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d
new file mode 100644
index 00000000000..896c6ca8447
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d
@@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12_nc-ldst16.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	7940009b 	ldrh	w27, \[x4\]
+			0: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d
new file mode 100644
index 00000000000..06aa052b949
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d
@@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	7940009b 	ldrh	w27, \[x4\]
+			0: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.s b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.s
new file mode 100644
index 00000000000..65f9df7bb0b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- tprel_lo12_nc for LDST16
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC
+	ldrh  w27, [x4, #:tprel_lo12_nc:sym]
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d
new file mode 100644
index 00000000000..7b8f6bf495f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d
@@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12_nc-ldst32.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	b98000f4 	ldrsw	x20, \[x7\]
+			0: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d
new file mode 100644
index 00000000000..c83044b3ac0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d
@@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	b98000f4 	ldrsw	x20, \[x7\]
+			0: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.s b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.s
new file mode 100644
index 00000000000..bdebc92f72b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12_nc for LDST32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC
+	ldrsw  x20, [x7, #:tprel_lo12_nc:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d
new file mode 100644
index 00000000000..f8827505a63
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d
@@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12_nc-ldst64.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d
new file mode 100644
index 00000000000..8e16b09d97c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d
@@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.s b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.s
new file mode 100644
index 00000000000..8b2b3b217b9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12_nc for LDST64
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC
+	ldr  x27, [x4, #:tprel_lo12_nc:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d
new file mode 100644
index 00000000000..14e3345b7d3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d
@@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12_nc-ldst8.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	3940005d 	ldrb	w29, \[x2\]
+			0: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d
new file mode 100644
index 00000000000..a87429f85d5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d
@@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	3940005d 	ldrb	w29, \[x2\]
+			0: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC	sym
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.s b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.s
new file mode 100644
index 00000000000..816aede6180
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12_nc for LDST8
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC
+	ldrb  w29, [x2, #:tprel_lo12_nc:sym]
+