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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2009-02-21 17:29:14 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2009-02-21 17:29:14 +0000
commit07c485ce78b60de7a40e4606f1f95d9c492d52ed (patch)
tree927eb066ac7818aeba2c6c7dd6986a77069b3de4 /target-ppc/helper.c
parentTurn MMUs and caches off on reset (diff)
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Turn MMU off on reset
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6637 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/helper.c')
-rw-r--r--target-ppc/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index fc62a635f..e02dcb03d 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2735,12 +2735,12 @@ void cpu_ppc_reset (void *opaque)
msr |= (target_ulong)1 << MSR_VR; /* Allow altivec usage */
msr |= (target_ulong)1 << MSR_SPE; /* Allow SPE usage */
msr |= (target_ulong)1 << MSR_PR;
- env->msr = msr & env->msr_mask;
#else
env->nip = env->hreset_vector | env->excp_prefix;
if (env->mmu_model != POWERPC_MMU_REAL)
ppc_tlb_invalidate_all(env);
#endif
+ env->msr = msr & env->msr_mask;
hreg_compute_hflags(env);
env->reserve = (target_ulong)-1ULL;
/* Be sure no exception or interrupt is pending */